In the paper "On Interprocess Communication", the author Leslie Lamport have developed a formalism for interprocess communication via shared registers based on lower-level, non-atomic operations and have proposed the definitions of safe, regular, and atomic registers. Also Lamport's description for the "interprocess" publication.

For safe registers, a read that overlaps a write operation is allowed to return any one of the possible values of the register.

My problem is

How practically relevant is this specification of safe registers?

Particularly, is it possible for a read of an actual register/memory unit in a multiprocessor computer to return an arbitrary value when it is concurrent with a write?

What about going to a lower level such as circuits/flip-flop?

In what sense, does a safe register exist?

  • 1
    $\begingroup$ See en.wikipedia.org/wiki/Cache_coherence — you do not read & write the same physical register simultaneously, however, you may read & write cached copies of the value in different local caches, and then it is up to the cache coherence protocol what might happen. Usually, the low-level details are not visible to the programmer; the contract between the programmer and the underlying system is the memory model, en.wikipedia.org/wiki/Memory_model_(programming) $\endgroup$ – Jukka Suomela Jan 8 '15 at 19:03
  • $\begingroup$ Oh, I just realised that there are certain systems in which simultaneous read & write on a physical level might be indeed possible: dual-port RAM. For example, this might be relevant: microsemi.com/document-portal/doc_view/… $\endgroup$ – Jukka Suomela Jan 8 '15 at 19:12
  • $\begingroup$ @JukkaSuomela Thanks. The "dual-port RAM" article is helpful. Would you mind converting your comment to an answer? $\endgroup$ – hengxin Jan 10 '15 at 11:08
  • $\begingroup$ Let's wait and see if someone who knows a bit more about the topic writes an answer. :) I think you might also consider asking at electronics.stackexchange.com where there are people who actually understand the low-level hardware details much better. $\endgroup$ – Jukka Suomela Jan 10 '15 at 14:09

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